This application claims priority under 35 U.S.C. § 119(a) on Patent Application No. 2005-167525 filed in Japan on Jun. 7, 2005, the entire contents of which are hereby incorporated by reference.
The present invention relates to multilayer circuit boards in which a plurality of circuit substrates configured by forming a circuit pattern on an insulating base material are layered via an insulating layer, and in which a through-hole and a via hole are formed, and their method of production.
Conventionally, in hole formation processing of through-holes or via holes in a multilayer circuit board, a method using a carbonic acid gas laser or YAG laser is well known as a “laser via method”, and is often used.
FIGS. 6 to 14 are schematic cross-sectional views that show an example of a production process for a multilayer circuit board using that “laser via method”. That production process is described below.
First, as shown in FIG. 6, a layering substrate 201, which becomes a core, is formed by layering an inner conducting layer 102 configured from copper foil on both faces of an insulating base material 101 configured from an insulating resin substrate that becomes an inner insulating layer. Here, a fiberglass-reinforced epoxy resin substrate, a polyimide film, or the like is ordinarily used as the insulating base material 101.
Next, as shown in FIG. 7, a hole 103, which becomes a 2-3 interlayer inner via hole that connects the inner conducting layer 102 on both faces of the layer substrate 201, is formed.
Then, after appropriate preprocessing is performed, as shown in FIG. 8, a panel plating layer 104 is formed by performing panel plating processing on an entire layering substrate 202, which includes the hole 103 that becomes the 2-3 interlayer inner via hole.
Next, as shown in FIG. 9, an inner circuit is formed by etching the copper foil on both faces of a layer substrate 203 on which that panel plating has been performed, forming an inner circuit pattern 105 and a 2-3 interlayer inner via hole 106.
Afterward, as shown in FIG. 10, the 2-3 interlayer inner via hole 106 is filled with a filling resin 107.
As shown in FIG. 11, an interlayer insulating layer 108 configured from an insulating resin substrate and an outer conducting layer 109 configured from copper foil are layered in order on both faces of a layering substrate 204 that has been through the above processing, forming a multilayer substrate. Here, a prepreg that is a semi-hardened fiberglass-reinforced epoxy resin, or instead a combination of a suitable resin material and an adhesive, is ordinarily used as the insulating resin substrate.
Next, as shown in FIG. 12, in the above multilayer substrate, a portion of the outer conducting layer 109 where a via hole should be formed is removed by etching.
Then, a laser beam with an appropriate intensity and wavelength is irradiated on an interlayer insulating layer 111 at a location 110 where the copper foil of the outer conducting layer has been removed by the above etching. Thus, as shown in FIG. 13, a via hole 112 is formed by removing only the interlayer insulating layer 111 at the location 110 where the copper foil has been removed. Here, an interlayer insulating layer 113, which is a portion where there is copper foil, is not removed because the copper foil fulfills the role of a mask. This technique itself is publicly known as a “conformal process” method.
When a via hole has been formed in the manner described above, by performing appropriate panel plating processing and etching processing on the entire substrate, forming a 1-2 interlayer via hole 114 and an outer circuit pattern 115, a multilayer circuit board as shown in FIG. 14 is formed. Here, surface processing such as plating or a resist layer formed on the outer conducting surface, symbol printing, and the like are not shown in order to simplify the figures.
Other than a method as described above for producing a multilayer circuit board, there is also a method in which a plurality of 1-2 layer substrates, 3-4 layer substrates and the like are produced in a state in which the 2-3 interlayer via hole has been filled with resin (see FIG. 10), and a multilayer substrate is produced in a form with these substrates layered.
With the conventional multilayer circuit board described above, there are problems as stated below with respect to productivity and reliability. The primary cause of these problems is that there is a difference in the laser processing speed and laser processability for the processing laser beam between the various materials that constitute the inner insulating layer and the interlayer insulating layer. Below, such problems are described in detail.
The inner insulating layer and the interlayer insulating layer of the multilayer circuit board are ordinarily reinforced with fiberglass, polyimide fiber, or the like, with an object of insuring the dimensional stability, shape stability, and mechanical strength of the circuit board. However, in comparison to epoxy resin or the like used as the material of the inner insulating layer and the interlayer insulating layer, the laser processability of these reinforcing fibers is poor, so there is a large difference in the processing speed and in the quantity of energy necessary for processing. Thus, as shown in FIG. 16, fiber residue or an unprocessed material 301 remains in a via hole or through hole formed in the multilayer circuit board.
In order to address this problem, methods of improving the laser processability by pre-processing the reinforcing fiber or the like, and methods of designing the weave, thickness, and shape of the reinforcing fiber and the like, have been proposed (for example, see JP 2002-198653A, JP 2002-237680A, JP 2003-31957A, JP 2003-503832A, JP H11-195853A, JP H11-330310A, and JP 2004-146711A). However, these methods are imperfect, and there is the problem that preprocessing for these materials takes time and labor.
Further, the laser processing speed and the quantity of energy necessary for processing differs between the inner insulating layer and the interlayer insulating layer of the multilayer circuit board. Thus, for example, when the outer interlayer insulating layer requires irradiation of a laser beam with much greater energy than the inner insulating layer, laser irradiation on the outer interlayer insulating layer damages the inner insulating layer due to excessive energy.
For example, a 1-2-3 interlayer via hole 116 that connects one outer conducting layer and a pair of inner conducting layers is realized by connecting two via holes, a 1-2 interlayer via hole 114 that connects the one outer conducting layer and one of the inner conducting layers and the 2-3 interlayer inner via hole 106 that connects the pair of inner conducting layers, with a signal line of a secondary conducting layer 117 common to the two via holes. To form via holes that pass through or connect a plurality of layers of the multilayer circuit board, a process that forms a via hole in each layer and a process that fills the inner via hole with filling resin (see FIG. 10) is necessary, and the production process becomes extremely complicated.
Also, as shown in FIG. 15, because the surface of the substrate, in which the interlayer insulating layer 108 and the outer insulating layer 109 have been layered in the inner conducting layer on both sides of the substrate whose inner via holes are filled, is flat and smooth, path etching defects in the outer circuit shape in the above production process often occur.
Further, because it is difficult to stack a via hole on the same axis as an inner via hole, in the above production process it is necessary to form the 1-2 interlayer via hole 114 at a position slightly offset from the axis of the 2-3 interlayer inner via hole 106. With respect to this point, a “spiral via” method has been proposed in which, when it is desired that via holes are not offset from each other, the via holes are formed with their positions incrementally offset in a spiral shape. Also, with the object of improving wiring density and the like, methods have been proposed in which, conversely, via holes are formed on the same axis without filling (for example, see JP 2002-94240A, and JP 2002-237679A), and in which, after layering a plurality of layers without performing hole formation/via hole processing for layer units, holes are formed with a plurality of various depths in a single process (for example, see JP H10-224040A, JP H10-190235A, and JP H10-224041A).
As described above, in a conventional multilayer circuit board, differences in laser processing speed and laser processability of the processing laser beam between various materials that constitute the inner insulating layer and the interlayer insulating layer cause the problems of unprocessed material remaining in a via hole or a through hole, and damage to a layer of the multilayer circuit board due to excessive laser beam energy, affecting the reliability of the multilayer circuit board. Also, the production method of a conventional multilayer circuit board is complicated because, when forming a via hole that passes through or connects a plurality of layers, a process of forming a via hole in each layer unit is necessary. Further, in a multilayer circuit board formed with this production method, there are the problems that path etching defects occur easily, and via holes that pass through a plurality of layers cannot be formed on the same axis.